Technical blog will be written in English for more inspiration.
This blog mainly focuses on recording my first project on FPGA and last project of my undergraduate study. This project is based on Altera FPGA board. Aging effect of transistors may cause great delay of combinational circuit. My aging sensor is used to detect the cicuit’s delay and alert. The aging sensor is implemented by ECO change via Quartus. Aging simulation of the circuit is carried out by increasing clock’s frequency. This page is currently under construction and will be updated soon.
